FDSOI technology relies on overfilled epitaxial (epi) layers to supply dopants to the source/drain which results in extremely high parasitic capacitance (between the gate and the raised source/drain). Faceted epi is preferred for FDSOI technology to reduce this parasitic capacitance (Ceff), but it is hard to control. Faceted epi can also suffer from poor wafer-to-wafer and lot-to-lot variability. For instance, facet height, Ceff, available dopant to diffuse to the channel, and silicide proximity are all variable.
A need therefore exists for methodology enabling control of faceted raised source/drain epi formation, and the resulting device.